1. Field of the Invention
This invention relates to circuits and methods for sampling the level of a signal and holding the sampled value constant for a pre-determined period of time. This invention particularly relates to circuits and methods that maintain the integrity of the sampled value when supply and substrate noise are present.
2. Description of the Related Art
Sample and hold circuits typically employ a switching device for periodically connecting a capacitor to an input signal to be sampled. While the capacitor is connected to the input signal, it will charge or discharge to the voltage level of the input signal. Once the switching device is disconnected, the capacitor will hold that voltage level.
In some cases, noise can render the sampled signal inaccurate for subsequent analog-to-digital conversion. Sources of noise can include perturbations on an application specific integrated circuit (ASIC) ground rail caused by ASIC digital activity.
One approach to minimize the impact of noise on the sampled signal is to incorporate complex differential sample and hold systems. However, the addition of such systems increases the cost and complexity of the sample and hold circuit. Further, such complex differential sample and hold systems require larger areas and consume additional current for their operation.